Design 4 Bit Binary Adder Using Ic 7483
Experiment No:6
4- bit adder, 2's compliment subtractor circuit using a 4-bit adder IC. Verification of the operation of the circuit.
Apparatus: Logic trainer kit, 4-bit adder (IC 7483), X-OR gates (IC 7486), wires
Theory: IC 7483 is a 4 bit adder. In binary, subtraction can be performed by using 2's complement method. In this method negative number is converted into its 2's complement and it is added to the other number. The result of this addition is the subtraction of origin numbers.
If we modify the adder circuit, such that 2's complement and simple representation are presented, we can perform addition subtraction as required. X-OR gate is used as a controlled inverter/ buffer for this purpose. Use it as buffer for addition and inverter for subtraction.
Procedure:
1. Connect the IC 7483 and IC 7486 as per diagram.
2. Connect all A's and all B's to logic sources, S's to logic indicators.
3. Connect Cin to logic 0, this will set the circuit for addition.
4. Give various input combinations, verify adder operation. Here Cout is MSB of addition.
5. Connect Cin to logic 1, this will set the circuit for subtraction by 2's complement method.
6. Give various input combinations and observe outputs. Here Cout is neglected (2's complement subtraction)
7. Switch off power supply.
Experiment No:7
Aim: Verification of truth table for 7 segment decoder/ driver ICs
Apparatus: Logic trainer kit, 7 segment decoder/ driver (IC 7447), wires
Theory: Seven Segment is a display device. 7 LEDs are used in this device. When a LED is forward biased, it emits light. By using a 7 segment, we can display various characters, formed by forward biased segments.
It can be used to display 0-9 and a-F, BCD and Hexadecimal numbers can be displayed with it.
7 segment decoder/ driver is a combination of decoder circuit and display driver (for 7 segments). Input is given from 4 inputs and output is shown on display
Procedure:
1. Connect 4 inputs of display/ driver circuit to logic sources and switch on main supply.
2. Give any combination to circuit.
3. Observe the display; it should be according to BCD/ Hexadecimal encoding.
4. Give various input combinations, observe their corresponding outputs.
5. Connect Cin to logic 1, this will set the circuit for subtraction by 2's complement method.
6. Switch off power supply.
Experiment No: 8
Aim verfification of truth table for 8:1 multiplexer.
Apparatus: Logic trainer kit, 8:1 multiplexer (IC 74151), wires
Theory: A multiplexer (MUX) is an electronic circuit which has many inputs but only one output. It has some select lines, number of select lines is related to the number of inputs. If there are N select lines, any one out of 2 N inputs can be selected. It is actually a decoder with all AND gates connected to separate select combination and a unique input line. Their outputs are given to an OR gate to obtain one output. By using proper combination of select lines, any one input can be selected at a time and its data is sent to the output.
Procedure:
1. Connect inputs and select lines of multiplexer to logic sources.
2. Connect output to logic indicator.
3. Set/ reset the inputs value in desired manner.
4. By using select lines give any combination to multixer
5. Observe the output and verify that it is same as input given to the selected input.
6. Give various input combinations, observe their corresponding outputs.
7. Switch off power supply.
Experiment No:9
Construction of 4 bit SISO, SIPO, PISO, PIPO shift registers and verification of their operation.
Apparatus: Logic trainer kit, D flip flop (IC 74143), wires
Theory: Shift register is used to move the data. To move data, it must be stored. So shift register actually stores data and moves it to left, right as per signal given to it. Its various types are:
-Serial In Serial Out
-Serial In Parallel Out
-Parallel In Serial Out
-Parallel In Parallel Out
As flip flops are capable to store data (1 bit in a flip flop), they are used to construct shift registers
Serial In: Output of one flip flop is input of another. Data is serially given i.e. only first flip flop receives data; it is shifted to next flip flops.
Serial Out: Data is taken out from last flip flop
Parallel In: All flip flops are loaded simultaneously
Parallel Out: data is taken parallely by taking outputs from all flip flops at same time.
Procedure:
1. Connect flip flops as per given diagram
2. Connect inputs to Q3, and Q0 to logic indicator.
3. Apply clock and data train to Q3, observe output at Q0(SISO)
4. For SIPO, observe outputs at all Q's by connecting all to logic indicators
5. Repeat for parallel in by connecting D's to logic sources and outputs at Q0 for PISO, Q's for PISO
6. Switch off supply.
Experiment No 10
Construction and verification of operation of 4-bit ring counter
Apparatus: Logic trainer kit, D flip flops(IC 74173), wires.
Theory : Ring counter is constructed by modifying the Serial In Serial Out shift register. The basic ring counter can be obtained by connecting the last output to first input. When clock signal is applied, data is shifted in a circular manner or in a closed ring, so it is called a ring counter.
Procedure:
1. Connect d flip flops as per circuit diagram.
2. Connect clock signal to logic source
3. Apply clock signal continuously and observe the output
4. If all outputs are zero then disconnect input to first flip flop
5. Apply 1 to it and give clock signal.
6. Reconnect Q0 to D3 and check operation of this circuit
7. Observe the out put.
8. Switch off power supply
Experiment No 11
Construction and verification of operation of 4-bit ring counter
Apparatus: Logic trainer kit, JK flip flop, wires
Theory : A digital counter is an electronic circuit which is used to count the clock pulses. In a counter, a flip flop in toggle mode is used. So JK flip flops can be used with JKs connected to 1 or T flip flops can be used.
Counter can be up or down counter. When output is in the form of increasing binary number, it is an up counter, otherwise down counter. Mod of a counter is the number of outputs i.e. count values. A Mod –M counter can count from 0 to M-1 and it requires log 2 m flip flops.
Procedure:
1. Connect the flip flops as per diagram
2. Connect clock to logic source, outputs to logic indicators, j and k to 1.
3. Start giving clock pulses (on/off repetition), it will change the output.
4. Observe the outputs and compare with binary count.
5. Verify its operation.
6. Switch off power supply
Design 4 Bit Binary Adder Using Ic 7483
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